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Sunday October 20, 2024 1:30pm - 5:00pm CDT
PDC1: Cost Breakdown and Analysis of Microelectronics Packaging Technologies
Instructor: Amy Lujan,SavanSys Solutions LLC

This PDC will present process flows and analyze the cost drivers of mature and advanced packaging technologies. Activity-based cost modeling will be used, and this course will explain why and how cost modeling is useful. The technologies covered are wire bond, flip chip, wafer-level packaging (fan-in and fan-out), and interposer-based packaging (also called 2.5D). Each packaging technology will be introduced, process flow(s) will be presented in step-by- step detail, and cost drivers will be highlighted. Cost drivers are design parameters that have a notable impact on the final package cost. All types of direct cost will be covered, including labor, material, capital, tooling, and yield; indirect costs will be explained as well. Case studies will be provided for each packaging technology. The goal of this PDC is to teach which design details drive different types of cost to both technical and non-technical people in the microelectronics supply chain. With a better understanding of packaging technology cost drivers, cost-effective decisions can be made.

Sunday October 20, 2024 1:30pm - 5:00pm CDT
Room 51

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